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#riscv

3 posts3 participants0 posts today
AS 396507<p>Our lead relay engineer <span class="h-card" translate="no"><a href="https://infosec.exchange/@alexhaydock" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>alexhaydock</span></a></span> has increased our stateless <a href="https://disobey.net/tags/Tor" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Tor</span></a> exit relay deployment to 96! (+1 because of the new <a href="https://disobey.net/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> bare-metal node, +1 other we redeployed due to a silly spelling error). We're stress testing our three AMD Epyc 7402P servers that use <a href="https://disobey.net/tags/Proxmox" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Proxmox</span></a>.</p><p>Each one of the 96 Tor exit nodes are diskless Unified Kernel Images, 56MB in total size, using <span class="h-card" translate="no"><a href="https://fosstodon.org/@alpinelinux" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>alpinelinux</span></a></span>'s alpine-make-rootfs with an absolutely bare minimum number of packages. We'll be publishing more about our new architecture and configuration soon.</p><p><a href="https://disobey.net/tags/AlpineLinux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AlpineLinux</span></a> <a href="https://disobey.net/tags/privacy" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>privacy</span></a> <a href="https://disobey.net/tags/anonymity" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>anonymity</span></a> <a href="https://disobey.net/tags/AntiCensorship" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AntiCensorship</span></a> <a href="https://disobey.net/tags/AccessToInformation" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AccessToInformation</span></a> <a href="https://disobey.net/tags/TorOps" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TorOps</span></a> <a href="https://disobey.net/tags/TorOperators" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TorOperators</span></a></p>
🇺🇦 haxadecimal<p>My friend <span class="h-card" translate="no"><a href="https://mastodon.social/@Needlesscomplexity" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>Needlesscomplexity</span></a></span> has posted two articles about RISC-V assembly language techniques to his substack:<br><a href="https://needlesscomplexity.substack.com/p/efficient-risc-v-range-checking" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/efficient-risc-v-range-checking</span></a><br><a href="https://needlesscomplexity.substack.com/p/efficient-sign-extension-on-risc" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/efficient-sign-extension-on-risc</span></a><br>And a library of useful integer operations:<br><a href="https://needlesscomplexity.substack.com/p/rvint-integer-mathematical-library" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">needlesscomplexity.substack.co</span><span class="invisible">m/p/rvint-integer-mathematical-library</span></a><br>I did a lot of assembly language programming back when dinosaurs still roamed the earth, and there are still some valid use cases even today. I firmly believe that having a grasp of assembly language also helps one write better HLL code.<br><a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://mastodon.social/tags/assembly" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>assembly</span></a></p>
Tindie Maker Marketplace<p>Play with the ESP32-C5 - finally! <a href="https://hackaday.social/tags/TindieBlog" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TindieBlog</span></a> <a href="https://hackaday.social/tags/ESP32" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ESP32</span></a> <a href="https://hackaday.social/tags/DualBandWifi" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DualBandWifi</span></a> <a href="https://hackaday.social/tags/Wifi6" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Wifi6</span></a> 802.15.4 <a href="https://hackaday.social/tags/Thread" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Thread</span></a> <a href="https://hackaday.social/tags/Zigbee" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Zigbee</span></a> <a href="https://hackaday.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <br><a href="https://blog.tindie.com/2025/08/play-with-the-esp32-c5-finally/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">blog.tindie.com/2025/08/play-w</span><span class="invisible">ith-the-esp32-c5-finally/</span></a></p>
jbz<p>🐧Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage" • Phoronix</p><p>｢ Linus Torvalds has used his authority to reject the RISC-V architecture changes for the Linux 6.17 kernel. The RISC-V updates won't land this cycle and will need to try again for v6.18 later in the year ｣</p><p><a href="https://www.phoronix.com/news/Linux-6.17-RISC-V-Rejected" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/Linux-6.17-R</span><span class="invisible">ISC-V-Rejected</span></a></p><p><a href="https://indieweb.social/tags/linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>linux</span></a> <a href="https://indieweb.social/tags/kernel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>kernel</span></a> <a href="https://indieweb.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://indieweb.social/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a></p>
𝕂𝚞𝚋𝚒𝚔ℙ𝚒𝚡𝚎𝚕<p>Linus Torvalds calls Google engineer's RISC-V code "garbage" in Linux 6.17 dispute: The engineer took the criticism well.</p><p>🐧 <a href="https://www.techspot.com/news/109019-linus-torvalds-calls-google-engineer-risc-v-code.html" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">techspot.com/news/109019-linus</span><span class="invisible">-torvalds-calls-google-engineer-risc-v-code.html</span></a></p><p><a href="https://chaos.social/tags/linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>linux</span></a> <a href="https://chaos.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://chaos.social/tags/google" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>google</span></a> <a href="https://chaos.social/tags/linustorvalds" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>linustorvalds</span></a> <a href="https://chaos.social/tags/criticism" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>criticism</span></a> <a href="https://chaos.social/tags/garbage" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>garbage</span></a> <a href="https://chaos.social/tags/googlecriticism" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>googlecriticism</span></a> <a href="https://chaos.social/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>hardware</span></a> <a href="https://chaos.social/tags/critic" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>critic</span></a> <a href="https://chaos.social/tags/software" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>software</span></a> <a href="https://chaos.social/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensource</span></a></p>
alios<p>Ich mag <a href="https://23.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> architektonisch sehr und ich mag <span class="h-card" translate="no"><a href="https://social.kernel.org/users/torvalds" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>torvalds</span></a></span> Code Reviews ... Wenn beides in nem PR zusammen kommt: &lt;3 </p><p>Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage"</p><p><a href="https://www.phoronix.com/news/Linux-6.17-RISC-V-Rejected" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/Linux-6.17-R</span><span class="invisible">ISC-V-Rejected</span></a></p>
Hippo 🍉<p>Another hardware-focused project is <a href="https://fosstodon.org/tags/RIVET" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RIVET</span></a>, making a plug-and-play way for <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> systems to connect to <a href="https://fosstodon.org/tags/ethernet" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ethernet</span></a> 🔌</p><p><a href="https://nlnet.nl/project/RIVET/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">nlnet.nl/project/RIVET/</span><span class="invisible"></span></a></p><p>These are the small things that go a long way in speeding up <a href="https://fosstodon.org/tags/OpenHardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenHardware</span></a> development.</p><p>(I don't know if you gathered, but I like using open, customisable, and repairable devices that I can specially tailor to my needs—and I'm excited to see this take more shape in future!)</p><p>🧵 9/n</p>
Bo Morgan<p>My first RISC-V program, running on an ESP32-S3 Arduino Nano, driven through a haptic piezoelectric motor, playing a Bo Diddley beat at 140 BPM with a 30 Hz vibration. Need to listen closely... It's a haptic motor after all, not a speaker.</p><p><a href="https://kolektiva.social/tags/foss" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>foss</span></a> <a href="https://kolektiva.social/tags/fosh" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>fosh</span></a> <a href="https://kolektiva.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> <a href="https://kolektiva.social/tags/esp32" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>esp32</span></a> <a href="https://kolektiva.social/tags/arduino" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>arduino</span></a> <a href="https://kolektiva.social/tags/bodiddley" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>bodiddley</span></a> <a href="https://kolektiva.social/tags/beat" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>beat</span></a> <a href="https://kolektiva.social/tags/beats" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>beats</span></a> <a href="https://kolektiva.social/tags/music" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>music</span></a> <a href="https://kolektiva.social/tags/electronicmusic" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>electronicmusic</span></a></p>
Andrew Jones (hpcnotes)<p>A question for chip gurus to explain (ie argue 😁) …</p><p>Purely in architectural terms (ie ignore current success / adoption etc) - which is/was the best architecture: <a href="https://mast.hpc.social/tags/x86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>x86</span></a> vs <a href="https://mast.hpc.social/tags/ARM" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM</span></a> vs <a href="https://mast.hpc.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> vs <a href="https://mast.hpc.social/tags/MIPS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>MIPS</span></a> vs <a href="https://mast.hpc.social/tags/SPARC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SPARC</span></a> vs <a href="https://mast.hpc.social/tags/IA64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>IA64</span></a> vs Alpha - and why? What pros/cons of each make the choice?</p>
Deutschland<p><a href="https://www.europesays.com/de/329042/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="">europesays.com/de/329042/</span><span class="invisible"></span></a> Linux-tauglich: RISC-V-Einplatinencomputer für unter 40 Euro <a href="https://pubeurope.com/tags/Deutschland" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Deutschland</span></a> <a href="https://pubeurope.com/tags/Einplatinencomputer" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Einplatinencomputer</span></a> <a href="https://pubeurope.com/tags/Germany" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Germany</span></a> <a href="https://pubeurope.com/tags/IT" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>IT</span></a> <a href="https://pubeurope.com/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://pubeurope.com/tags/Prozessoren" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Prozessoren</span></a> <a href="https://pubeurope.com/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://pubeurope.com/tags/Science" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Science</span></a> <a href="https://pubeurope.com/tags/Science" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Science</span></a>&amp;Technology <a href="https://pubeurope.com/tags/SiFive" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SiFive</span></a> <a href="https://pubeurope.com/tags/StarFive" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>StarFive</span></a> <a href="https://pubeurope.com/tags/Technik" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technik</span></a> <a href="https://pubeurope.com/tags/Technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technology</span></a> <a href="https://pubeurope.com/tags/Wissenschaft" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Wissenschaft</span></a> <a href="https://pubeurope.com/tags/Wissenschaft" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Wissenschaft</span></a>&amp;Technik</p>
Flux<p>“RISC architecture is going to change everything.”</p><p>Have you seen my seven-part Guide to <a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> assembler? No ads or crappy popups. <a href="https://projectf.io/posts/riscv-arithmetic/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">projectf.io/posts/riscv-arithm</span><span class="invisible">etic/</span></a></p>
adingbatponder<p><span class="h-card" translate="no"><a href="https://liliputing.com/author/liliputing_/" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>liliputing_</span></a></span> <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> small <a href="https://fosstodon.org/tags/SBC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SBC</span></a> single board computer <a href="https://fosstodon.org/tags/VisionFive2" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>VisionFive2</span></a> <a href="https://fosstodon.org/tags/visionfive2lite" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>visionfive2lite</span></a></p><p><a href="https://www.kickstarter.com/projects/starfive/visionfive-2-lite-unlock-risc-v-sbc-at-199" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">kickstarter.com/projects/starf</span><span class="invisible">ive/visionfive-2-lite-unlock-risc-v-sbc-at-199</span></a></p>
Frederic Jacobs<p>Catching up on some of the really great talks from the Zurich DVClub on RISC-V Verification <br><a href="https://alpinumconsulting.com/dv-club-zurich-riscv-verification/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">alpinumconsulting.com/dv-club-</span><span class="invisible">zurich-riscv-verification/</span></a><br><a href="https://mastodon.social/tags/DV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DV</span></a> <a href="https://mastodon.social/tags/SiliconEngineering" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SiliconEngineering</span></a> <a href="https://mastodon.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://mastodon.social/tags/FormalMethods" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FormalMethods</span></a> <a href="https://mastodon.social/tags/FV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FV</span></a></p>
Keldrim :verified_paw:<p>Also why we are at it some new <a href="https://meow.social/tags/RISC_V" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC_V</span></a> <a href="https://meow.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> food from Milk-V in form of the Milk-V Titan ITX board, chip specs look really good.<br>Though was not to happy about the Megrez, so wait to see how OS support shapes up first this time, also no Vector extension which is a big bummer.</p><p><a href="https://milkv.io/titan" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">milkv.io/titan</span><span class="invisible"></span></a></p>
Flux<p>I love to hear about interesting accounts to follow for <a href="https://mastodon.social/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FPGA</span></a>, <a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a>, <a href="https://mastodon.social/tags/oshw" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>oshw</span></a>, and <a href="https://mastodon.social/tags/permacomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>permacomputing</span></a>. 💛</p>
Matt Venn<p>Tomorrow on the open source silicon stream, I'll be looking at what's involved to submit to the <a href="https://chaos.social/tags/TinyTapeout" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TinyTapeout</span></a> <a href="https://chaos.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> competition. </p><p>Stream starts at 8:00 PT / 17:00 CEST / 21:30 IST</p><p><a href="https://www.youtube.com/live/7VM_dW1JcNY" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="">youtube.com/live/7VM_dW1JcNY</span><span class="invisible"></span></a></p><p> <a href="https://chaos.social/tags/opensourcesiliconstream" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>opensourcesiliconstream</span></a> <a href="https://chaos.social/tags/ASIC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ASIC</span></a></p>
Al Sutton<p>Looks like the designers of this <a href="https://alsutton.social/tags/AI" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AI</span></a> accelerator have kept the cost down by using a <a href="https://alsutton.social/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a> architecture in some parts. 🤔</p><p><a href="https://community.axelera.ai/product-updates/the-metis-ai-platform-a-technical-deepdive-125" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">community.axelera.ai/product-u</span><span class="invisible">pdates/the-metis-ai-platform-a-technical-deepdive-125</span></a></p>
hoergen<p>Statt Intel nun die 30Mrd Subventionen zu geben, kann man nun in die eigene Chip Entwicklung von RiscV investieren. Ganz nach dem EU Chip Act!</p><p><a href="https://horche.demkontinuum.de/search?tag=RiscV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RiscV</span></a> <a href="https://horche.demkontinuum.de/search?tag=Intel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Intel</span></a> <a href="https://horche.demkontinuum.de/search?tag=Europa" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Europa</span></a> <a href="https://horche.demkontinuum.de/search?tag=Deutschland" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Deutschland</span></a></p>
FCLC<p>*preparing for RISCV vector, IME and AME meetings* </p><p>"Just another Matrix Mondayyyyyyy"🎶</p><p>"I wish it were tensor Tuesdayyyyyyyy"</p><p><a href="https://mast.hpc.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://mast.hpc.social/tags/LFS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>LFS</span></a> <a href="https://mast.hpc.social/tags/RVV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RVV</span></a></p>
Paolo Amoroso<p>A history of MIPS, the processor architecture and the chip making company.</p><p><a href="https://thechipletter.substack.com/p/mips" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">thechipletter.substack.com/p/m</span><span class="invisible">ips</span></a></p><p><a href="https://oldbytes.space/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a> <a href="https://oldbytes.space/tags/mips" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>mips</span></a> <a href="https://oldbytes.space/tags/riscv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>riscv</span></a></p>
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